Multiphase charge-coupled devices (CCDs) have exhibited poor sensitivity in the blue, UV, and soft x-ray bands due to the absorbing polysilicon layers associated with the transfer gate structure of the CCDs. To avoid the gate problem, it has been necessary to either deposit UV sensitive organic phosphor coatings, e.g., coronene or lumagen [J. Janesick, et al., "Charge-Coupled Device Pinning Technologies," Optical Sensors and Electronic Photography, M. Blouke, D. Pophal eds., Proc. SPIE 1071, pp. 153-169, January 1989] onto the gate structure or thin the back side of the CCD in order to be able to illuminate the sensor through the back, as described in U.S. Pat. Nos. 4,760,031; 4,798,958; and 4,822,748.
Virtual-phase CCD technology has resolved the QE problem of the front illuminated CCD by leaving half of the pixel area "open," i.e., uncovered by polysilicon layers associated with the gate structure of the CCD. Such a large open area is made possible by employing a virtual electrode for one phase of the multiphase CCD, thus allowing photons to enter the photosensitive silicon of the CCD unimpeded. [J. Janesick, et al., "Virtual Phase Imager for Galileo," Solid State Imagers for Astronomy, J. Gary and D. Latham eds., Proc. SPIE 290, pp. 165-173, June 1981, and J. Janesick, et al., "Scientific Charge-Coupled Devices," Optical Engineering, 26(8), pp. 692-714, August 1987.]
Single clock operation is an important feature of virtual-phase CCD technology. Unfortunately, many CTE problems are associated with multiphase CCDs. Some have been solved by manipulating the clock phases to collapse potential pockets located in the signal channel. But for virtual-phase CCDs many of the potentials are defined by implants not external gates, so the user cannot control them to achieve optimum performance. This inflexibility has often proved to be a disadvantage for low-signal applications.
The CTE problem has been traced to spurious potential pockets which trap charges in the signal transfer channel because of improper potential well shape and/or depth of a pixel. [J. Janesick, et al., "Scientific Charge-Coupled Devices," Optical Engineering, 26(8), pp. 692-714, August 1987.]
Alignment of implants for potential well shape is crucial for the virtual-phase CCD technology to work, and small misalignments often create potential pockets (or bumps) which degrade CTE. To overcome the problem, it has been the practice to add a background charge which fills the pockets allowing signal charge to transfer over the troubled areas. But this practice incurs the penalty of increased noise associated with the shot noise of this added background charge.
The CTE problems associated with the virtual-phase CCDs are most conspicuous in the horizontal register because this register is clocked at a faster rate than the vertical registers which make up the array. Also, the horizontal register of the CCD is usually made larger to accommodate pixel summation, resulting in larger spurious pockets.
Virtual-phase CCDs are also afflicted with another problem, a phenomenon referred to as "spurious charge." [J. Janesick, et al., (1981) and J. Janesick, et al., (1987)] Although the noise level of the virtual-phase on-chip amplifier has been measured to be less than 10 electrons rms, the noise floor for many virtual-phase sensors is typically limited to about 30 electrons due to the production of small quantities of unwanted charge within each pixel as a result of clocking operation. During charge transfer from the clocked region to the virtual region, the surface beneath the gate of each pixel becomes inverted (i.e., holes from the channel stop regions migrate beneath the gate and pin the surface potential at substrate potential). Some of the holes become trapped in sites along the Si--SiO.sub.2 interface with sufficient energy to create electron hole pairs in the silicon by means of impact ionization. These spurious charge electrons are then collected in the nearest potential well. Since this process occurs each time charge is transferred, the amount of charge collected increases linearly with the number of transfers. Interestingly the noise that is produced is characterized as shot noise (i.e., noise that increases by the square root of the spurious signal generated).
Spurious charge grows exponentially with clock swing and the slew rate of the rising edge of the clock. Spurious charge generation is substantially greater in the horizontal register than the vertical registers solely because the horizontal clocks rise at a faster rate. Vertical spurious charge is controlled by simply wave-shaping the rising edge of the clock. However, other clocking schemes, such as tri-level clocking, [J. Janesick, et al. (1987)] must be used to control the amount of spurious charge generated in the horizontals. Nevertheless, the read noise floor of the detector is still limited. It should be mentioned that spurious charge generation acts as a background charge signal and can improve the CCDs apparent CTE. In fact, some virtual-phase users find this property advantageous and purposely allow some spurious charge to be generated, despite an associated increase in readout noise.